1. Field of the Invention
The present invention relates to a multi-function circuit module having a voltage level shifting function and a data latching function, and more particularly, to a multi-function circuit module having a voltage level shifting function and a data latching function via switching a plurality of switch elements.
2. Description of the Prior Art
Please refer to FIG. 1. FIG. 1 shows a simplified block diagram of a conventional source driving chip circuit 10 and a LCD device 20 according to a prior art. As shown in FIG. 1, in the conventional source driving chip circuit 10, display data will be transmitted through two data latching circuit, that is, a sample register 30 and a data latch circuit 100, and then the display data will be transmitted to a digital-to-analog converter 40 (DAC) via a level shifting circuit 200, and the converted analog voltage will be transmitted to the LCD device 20 by an OPAMP Buffer 50 in the end.
Please refer to FIG. 2 and FIG. 3. FIG. 2 shows a simplified circuit configuration diagram of the data latch circuit 100 shown in FIG. 1 according to the prior art. FIG. 3 shows a simplified circuit configuration diagram of the level shifting circuit 200 shown in FIG. 1 according to the prior art. As shown in FIG. 2 and FIG. 3, the data latch circuit 100 includes a first switch element 110, a second switch element 112, a first inverting element 120, and a second inverting element 122, and the level shifting circuit 200 includes a first switch element 210, a second switch element 212, a third switch element 220, a fourth switch element 222, a fifth switch element 230, and a sixth switch element 232. A voltage level of a signal required to be latched is inputted from an input node LATCH_IN, and the data latch circuit 100 will respectively generate a first input signal and a second input signal reverse to the first input signal at a first output node LATCH_OUT_P and a second output node LATCH_OUT_N, and the first input signal and the second input signal will be inputted respectively to a first signal receiving node LSH_IN_P and a second signal receiving node LSH_IN_N of the level shifting circuit 200. Next, the voltage level of the latched input signal will be pulled up to VDDA and VSSA via the circuit made up by the first switch element 210, the second switch element 212, the third switch element 220, the fourth switch element 222, the fifth switch element 230, and the sixth switch element 232, and the latched input signal after being pulled up will be outputted from a first signal outputting node LSH_OUT_P and a second signal outputting node LSH_OUT_N of the level shifting circuit 200.
However, it is very obvious that the conventional circuit design mentioned above needs a larger circuit layout area, and thus the conventional circuit design does not fit in with the trend of reducing the chip area as much as possible and the requirement of reducing fabrication cost of the chip.